Kontakt
Kako kupovati
Dostava
Savjetnik za kupnju
Digital System Test and Testable Design
Engleski
288 b
Do 30 dana za povrat
Kupci su kupili i
/
Meki uvez
13.64
€
/
Meki uvez
25.57
€
/
Tvrdi uvez
131.51
€
This book is about digital system testing and testable design. The concepts of testing and testability are treated together with digital design practices and methodologies. The book uses Verilog models and testbenches for implementing and explaining fault simulation and test generation algorithms.§Extensive use of Verilog and Verilog PLI for test applications is what distinguishes this book from other test and testability books. Verilog eliminates ambiguities in test algorithms and BIST and DFT hardware architectures, and it clearly describes the architecture of the testability hardware and its test sessions. Describing many of the on-chip decompression algorithms in Verilog helps to evaluate these algorithms in terms of hardware overhead and timing, and thus feasibility of using them for System-on-Chip designs. Extensive use of testbenches and testbench development techniques is another unique feature of this book. Using PLI in developing testbenches and virtual testers provides a powerful programming tool, interfaced with hardware described in Verilog. This mixed hardware/software environment facilitates description of complex test programs and test strategies.
Informacije o knjizi
Engleski
Poklonite ovu knjigu još danas
To je jednostavno
1 Dodajte knjigu u košaricu i odaberite isporuku kao poklon 2 Zauzvrat ćemo vam poslati kupon 3 Knjiga dolazi na adresu poklonoprimcaMoglo bi vas zanimati i
/
Tvrdi uvez
252.32
€
/
Meki uvez
35.37
€
/
Tvrdi uvez
126.16
€
/
Meki uvez
48.62
€
Dobar dan! Ja sam Libroamiko, vaš književni savjetnik.
Kako vam mogu pomoći?