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Layout Optimization in VLSI Design

Name: Layout Optimization in VLSI Design
Brand: Springer, Berlin
SKU: 01423530
Price: 154.26 EUR
Availability: InStock
Author: ing Lu
ISBN: 9781441952066

ing Lu

ing-Zhu Du

S. Sapatnekar

Jezik

Engleski

Knjiga Meki uvez

Libristo kod: 01423530

Nakladnici Springer, Berlin, listopad 2010

The exponential scaling of feature sizes in semiconductor technologies has side-effects on layout op... Cijeli opis

Libristo kod: 01423530

373 b

154.26 €

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The exponential scaling of feature sizes in semiconductor technologies has side-effects on layout optimization, related to effects such as interconnect delay, noise, crosstalk, signal integrity, parasitics effects, and power dissipation, that invalidate the assumptions that form the basis of previous design methodologies and tools. This book is intended to sample the most important, contemporary, and advanced layout optimization problems emerging with the advent of very deep submicron technologies in semiconductor processing. §Audience: A reference work for graduate students, senior undergraduates, and researchers.