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Knjiga Low Power and Process Variation Aware SRAM and Cache Design Avesta Sasan

Low Power and Process Variation Aware SRAM and Cache Design

Jezik

Engleski

Knjiga Tvrdi uvez

Knjiga Low Power and Process Variation Aware SRAM and Cache Design Avesta Sasan

Libristo kod: 01255548

Nakladnici Springer, travanj 2013

This book addresses process variability and power management for embedded memories, which are becomi... Cijeli opis

Libristo kod: 01255548

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This book addresses process variability and power management for embedded memories, which are becoming dominant components in today s Systems on Chip (SoCs). It provides thorough background on voltage scaling and the reliability effects on memories, while describing memory behavior at different voltages and frequencies. The authors describe a cross-layer approach, simultaneously targeting the manufacturing of devices, the inner-design of the memory circuits, as well as the way they are architected into a system. This approach enables the design of reliable, power-efficient systems in which memories are dominating area, power, and performance.

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Informacije o knjizi

Puni naziv Low Power and Process Variation Aware SRAM and Cache Design

Autor Avesta Sasan

Jezik

Engleski

Uvez Knjiga - Tvrdi uvez

Datum izdanja 2013

Broj stranica 200

EAN 9781461422716

ISBN 146142271X

Libristo kod 01255548

Nakladnici Springer

Dimenzije 155 x 235

Kategorija

Technology, Engineering, Agriculture > Electronics & communications engineering > Electronics engineering > Electronics: circuits & components

Computing & Information Technology > Computer hardware > Mainframes & minicomputers

Computing & Information Technology > Computer hardware > Storage media & peripherals

Computing & Information Technology > Computer science > Computer architecture & logic design

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